Exploring field-free switching mechanisms for advancing spin orbit torque MRAM technology

With the increasing demand for data storage, the present charge-based memory technologies are reaching their fundamental limits due to their poor reliability and volatile nature. Spintronic devices, leveraging spin's degree of freedom, offers a promising solution thanks to their non-volatility, fast processing, and higher integration capabilities.

Spintronics has already been instrumental in various storage technologies, from hard disk drive read heads to Magnetic Random-Access Memory (MRAM). The heart of MRAM technology lies in the Magnetic Tunnel Junction (MTJ), comprising an oxide tunnel barrier between two ferromagnetic layers. Spin-Transfer-Torque MRAM (STT-MRAM) is a mature technology where reading utilizes the Tunnelling Magnetoresistance (TMR) effect, while writing is achieved by passing a current through the oxide tunnel barrier to switch the magnetic state. However, reliability issues stem from the high switching current required for fast operation, leading to a shortened device lifetime. To tackle these challenges, Spin-Orbit Torque MRAM (SOT-MRAM) has currently garnered attention. SOT-MRAM utilizes a charge-spin conversion process induced by passing an electrical current through a heavy metal in contact with the MTJ to switch the magnetization of the storage magnetic layer. The separate writing and reading path in SOT-MRAM offers sub-ns writing speeds and improved reliability. The unique approach to separate the read and write operations of SOT MRAM positions it as a promising candidate for advancing high-performance memory technologies [1]. As future AI-driven applications rely not only on logic performance but also on fast access to large data volumes, SOT MRAM holds significant potential [2].

SOT-MRAM devices with perpendicular magnetic anisotropy, essential for scaled MRAM, requires an application of an external in-plane magnetic field to achieve deterministic SOT-induced switching. However, this approach hinders the real device application of this technology. Various approaches for enabling field-free SOT switching to have been actively researched by either utilizing in-plane stray fields or lateral structural symmetry breaking [3]. Despite recent advancements, the demand for reliable field-free switching solutions remains pressing in SOT-MRAM technology.

Recently, field-free switching is achieved by generating additional spin sources such as positioning an in-plane magnetic layer beneath a non-magnetic metal layer. This configuration creates a hybrid spin source, where the spin current originates from the combined effects of the bottom magnetic layer and its interfaces, effectively generating out of plane spin polarization for field free switching [4]. However, its current understanding and experimental demonstration are limited to microscale devices, which hinders its application in SOT MRAM technology. Furthermore, the influence of this hybrid spin source on magnetization switching dynamics of MTJs, crucial components in MRAM technology, remains unexplored. It is also anticipated that scaling effects from device fabrication processes-induced edge roughness may affect such hybrid spin sources, ultimately impacting the switching dynamics of MTJ devices. Therefore, understanding and efficiently controlling spin generation in such device concept to enable SOT field free switching in nanoscale devices opens important steps to advance SOT MRAM technology.

This PhD project aims to investigate the impact of additional spin sourceon field-free SOT switching in perpendicular MTJ memory cells. At first, the underlying physics of hybrid spin sources and its impacts on magnetization switching of SOT-MRAM devices will be investigated with advanced electrical and physical characterizations. The experimental study will be further complemented by performing micromagnetic modelling activities using tools such as OOMMF and Mumax. Later, other field-free switching approaches for SOT-MRAM will also be investigated. This dissertation seeks to elucidate the underlying physics governing the role of hybrid spin source in SOT-induced magnetization switching dynamics.  At IMEC, a dedicated 300-mm wafer platform will be employed to develop manufacturable SOT-MRAM devices [5]. This research will leverage an extensive toolset for magnetic and electrical characterization, including techniques such as vibrating-sample magnetometer, magnetic imaging techniques such magnetic force microscopy, magneto-optical Kerr microscopy, and device-level electrical characterization. Close collaboration with imec's device engineers specializing in magnetic devices will ensure synergy between device characteristic insights and practical implementation, addressing the technological challenges in SOT MRAM.

We seek a candidate with a physics or engineering background, a strong interest in experimental work, and a passion for cutting-edge science and technology, particularly in the fast-growing area of memory and logic technology, which is receiving significant momentum from the European Chip Act

References

1. https://www.ednasia.com/where-sot-mram-technology-stands-in-2024/
2. https://www.nanoic-project.eu/en/technologies
3. https://iopscience.iop.org/article/10.1088/2752-5724/ac6577
4. https://www.nature.com/articles/s41467-024-46113-1
5. https://www.imec-int.com/en/press/imecs-extremely-scaled-sot-mram-devices-show-record-low-switching-energy-and-virtually