/Digital Design Exploration of Compute-near-Memory Processing Unit Architectures for High Performance Systems

Digital Design Exploration of Compute-near-Memory Processing Unit Architectures for High Performance Systems

Master projects/internships - Leuven | Just now

Overcoming the Memory Wall with New Distributed Compute Architectures

Systems that deploy computational logic near memory can overcome typical von Neumann-based bottlenecks (e.g. memory wall) by limiting the amount of data transferred to central compute areas in a system. With modern compute-near memory (CnM) systems still in their infancy and typical programming paradigms focused on centralized computing however, new work must be undertaken to understand the power, performance, and area trade-offs of specific CnM-instruction set architecture (ISA) implementations.
In this internship, you will learn how to use imec’s system-level framework for examining novel memory technologies and compute-near-memory (CnM) processing cores. You will then implement and evaluate new capabilities for the CnM hardware model for a variety of application scenarios.

Key responsibilities will include:

  • Learning and using DRAM simulators to model memory technologies and protocols and perform performance analyses. 
  • Performing power and area analysis using Catapult HLS tools.
  • Examining new CnM hardware extensions for new applications.

This role is ideal for someone who is deeply interested in hardware-software codesign, electrical engineering, and working in an interdisciplinary environment that values innovation, creativity, and real-world impact.

Profile: You are analytical and detail-oriented, with a strong interest in memory technologies and near-memory accelerators, and their impact on high-level applications such as AI, genomics, databases, forecasting, or other datacentre-class algorithms. You are adept at or have a keen interest in high-level synthesis, programming, and modelling.

Background: Computer engineering, electrical engineering, memory, accelerators. Knowledge of SystemC, Catapult tools, and/or scripting languages is an advantage.

 

Type of Project: Internship; Thesis; Combination of internship and thesis 

Master's degree: Master of Engineering Technology; Master of Science; Master of Engineering Science 

Master program: Computer Science; Electromechanical engineering; Electrotechnics/Electrical Engineering 

Duration: 6 - 12 months 

For more information or application, please contact Joshua Klein (joshua.klein@imec.be).

 

Imec allowance will be provided. 

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