Validation of Full System-Level Simulation for Architectural Exploration

Full system-level simulation is used to model whole system hardware and software stacks, ranging from user-space applications and operating systems, to ISAs and computer hardware. By simulating major hardware components as tuneable black boxes in software, one can gain accurate performance statistics at a fraction of the simulation time and development overhead cost of RTL/HDL simulators. As a result, computer architects use full system-level simulation to extrapolate the benefits of novel architectural extensions running a set of modern workloads at a fraction of the development and simulation runtime overhead.
However, the performance statistics generated by full system-level simulators are a fantasy until the black boxes of the simulated system have been validated against hardware. Validation is achieved once target performance metrics of the target and simulated systems have a low error with respect to each other when running the same set of workloads. During this research internship, you will develop a gem5 system model and validate it against real hardware models.

Key responsibilities will include:

• Developing full system-level models in gem5 for deployment within imec infrastructure.
• Validating gem5 models against real hardware using a variety of micro- and macro-benchmarks.
• Making your work distributable and reproducible across imec teams with documentation.
• Building and using interfaces to other simulators, such as Ramulator2.

This role is ideal for someone who is deeply interested in hardware-software codesign, computer architecture, and working in an interdisciplinary environment that values innovation, creativity, and real-world impact.

Profile: You are analytical and detail-oriented, with a strong interest in system simulation and hardware-software codesign. You are adept at or have a keen interest in programming and performance evaluation tools.

Background: You have or are currently pursuing a degree in computer engineering, computer science, or electrical engineering. Knowledge of object-oriented programming, scripting languages, and RTL simulation is an advantage. 

Type of Project: Thesis; Combination of internship and thesis; Internship 

Duration: 6-12 months 

For more information or application, please contact Joshua Klein (joshua.klein@imec.be)

Imec allowance will be provided.