Full System-Level Simulation of Neural Compute Architectures

Modern heterogeneous compute systems targeting AI-based workloads, especially in low-power, mobile, and edge domains, typically rely upon a dedicated neural compute unit, or NPU, to process inference. NPU architectures typically consist of a local memory and accelerators targeting general matrix-matrix multiplication operations, however, recent advances in NPU architectures and their wide adoption are seeing increasing heterogeneity and multithreading capability. As a result, NPUs are subject to higher-order software effects and issues such as OS scheduling, CPU orchestration, concurrency, access to and management of virtual memory, and so on.

In order to properly assess the performance of various NPU architectures as well as enable architectural exploration of future NPU architectures, we aim to build a cycle-accurate NPU model into existing full system simulation infrastructure. During this research internship, you will examine publicly available NPU designs and implement the aforementioned cycle-accurate NPU model into the premier computer architecture simulator, gem5. 

Key responsibilities will include:

• Researching and learning about state-of-the-art NPU-enabled systems for AI inference.
• Developing a cycle-accurate, extensible, and tunable NPU model with sub-models for underlying accelerators and memory.
• Implement into full system-level simulation NPU-based software stacks based on the ONNX (and similar) frameworks for ease of application exploration.

This role is ideal for someone who is deeply interested in hardware-software codesign, computer architecture, and working in an interdisciplinary environment that values innovation, creativity, and real-world impact.

Profile: You are analytical and detail-oriented, with a strong interest in system simulation and hardware-software codesign. You are adept at or have a keen interest in programming and performance evaluation tools.

Background: You have or are currently pursuing a degree in computer engineering, computer science, or electrical engineering. Knowledge of object-oriented programming, scripting languages, gem5, and memory simulators is an advantage. 

Type of Project: Internship; Thesis; Combination of internship and thesis 

Master's degree: Master of Engineering Technology; Master of Science; Master of Engineering Science 

Master program: Computer Science; Electrotechnics/Electrical Engineering 

Duration: 6 - 12 months 

Supervisor: Chris Van Hoof 

For more information or application, please contact Joshua Klein (joshua.klein@imec.be).

Imec allowance will be provided.