Enabling workload-driven novel system-level reconfiguration methods leveraging system technology co-optimisation
Leuven | Just now
With the increasing diversity of domains using AI/ML-based applications, there is a growing diversity of workload requirements from electronic systems. While heterogeneous computing systems (CPU, GPU, and NPU accelerators) provide some level of optimization, the static nature of computation, communication, and memory elements limits the level of utilization for emerging workloads. Similarly, state-of-the-art reconfigurable systems (FPGAs, CGRAs, etc.) focus on runtime reconfiguration targeted at functionality modifications only.
The student will be working on a workload-aware system-level exploration framework. The project will involve identifying system-level designs that can leverage existing reconfigurable technologies, across computation, communication, and memory, to provide optimized PPAC (power, performance, area, and cost) trade-offs for a set of workloads.
Type of work: 30% literature survey to gain an understanding of the landscape of technology innovations and stat-of-the-art reconfigurable technologies. 70% hands-on modelling and framework development for driving the design and exploration of technology-architecture co-design.
Type of project: Combination of internship and thesis, Internship
Duration: 6-9 months
Required degree: Master of Engineering Technology, Master of Engineering Science
Required background: Computer Science, Electrotechnics/Electrical Engineering
Supervising scientist(s): For further information or for application, please contact: Siva Satyendra Sahoo (Siva.Satyendra.Sahoo@imec.be)
Imec allowance will be provided for students studying at a non-Belgian university.