RISC-V System level integration of digital AI accelerator

Recent advancements in Artificial Intelligence (AI), and more specifically Machine Learning (ML), have enabled an explosion in the number of new ML models. Additionally, these models are getting bigger, increasing the number of parameters that need to be trained. Hence, efficient training and execution (inference) of these models has become a top priority for both research and industry.imec is developing an AI inference accelerator with an innovative dataflow, in collaboration with academic partners. The objective of this internship is to design and implement an efficient interface between a novel hardware accelerator and a RISC-V processor acting as a control core. The project will involve hardware-software co-design to ensure seamless communication, low-latency data transfer, and optimized performance for target applications. The compiler for generating the program for the accelerator would be provided by the academic partners. 

Objectives

• Develop an interface for integrating the AI inference accelerator within a RISC-V SoC ecosystem
• Implement memory-mapped register design for control and data exchange.
• Comprehensive documentation to support future developments.

What skills do you need to apply?

• Knowledge of RISC-V architecture and ISA.
• Experience with hardware description languages (HDL) such as Verilog/VHDL.
• Some familiarity with SoC design and bus protocols
• Enthusiasm for artificial intelligence and compute architecture

What skills will you acquire?

• Experience with RISC-V accelerator integration
• Following a scientific approach to tackle research problems

The project will be supervised by researchers at imec in the Compute System Architecture department. imec is a world-renowned research center for nano-electronics and digital technologies, based in Leuven, Belgium. The student is expected to work from the imec Leuven, Belgium campus full time for a period of 3-5 months, beginning as soon as possible. 
Contact: debjyoti.bhattacharjee@imec.be  
 

Type of Project:  Combination of internship and thesis

Master's degree: Master of Engineering Technology; Master of Science

Master program:  Computer Science; Electrotechnics/Electrical Engineering

Duration:  4-5 months

For more information or application, please contact the supervising scientist Debjyoti Bhattacharjee (debjyoti.bhattacharjee@imec.be).

Imec allowance will be provided for students studying at a non-Belgian university.