Master projects/internships - Leuven | Just now
Make the smallest, thinnest, fastest intelligent transistor in the world and challenge von Neumann on the way
The rise of artificial intelligence and other data-intensive applications requires a dramatic shift from the traditional von Neuman architecture. One of the possible solutions to satisfy the increasing demand for faster and parallelized computational operations lies in the paradigm of in-memory computing, which dictates the performing of computational tasks directly in the memory itself. The development of this concept necessitates a re-design of the basic element used in computation -the transistor- to allow not only the performing of logical operations, but also the simultaneous “storage” of non-volatile states that can be reliably written and read.
Within this context, two dimensional (2D) materials, with their unique physical properties, like the extremely reduced thickness, the lack of dangling bonds in the out-of-plane direction, and the atomically flat surface, represent the perfect candidate for the fabrication of highly scaled and energy efficient devices. The integration of ferroelectric materials in 2D-based field effect transistors (FET) as the insulator layer would add the possibility of precisely shifting the threshold voltage of the ferroelectric FET (Fe-FET) -depending on the polarization of the ferroelectric layer- leading to the creation of a large memory window with high retention time.
In this project, the student will be responsible for the fabrication and electrical characterization of 2D material-based ferroelectric devices, employing mostly molybdenum disulfide (MoS2) as the 2D semiconductor channel and hafnium zirconium oxide (HZO) as the ferroelectric material (with the possibility of exploring other materials). The fabrication will start with capacitor devices, with the goal of testing the fabrication platforms and observing ferroelectric properties, to then proceed subsequently with more complex devices, like back gate 2D Fe-FET and dual gate (i.e. combination of back and top-gate) 2D Fe-FET, with the goal of observing a distinct hysteresis loop in the Id-Vg curve of the devices and optimizing their properties.
This work will be conducted in close collaboration with experimental researchers working on exploratory devices based on 2D materials.
Type of Project: Internship
Master's degree: Master of Engineering Technology; Master of Engineering Science; Master of Science
Master program: Nanoscience & Nanotechnology; Electrotechnics/Electrical Engineering; Physics
Duration: 12 months
Supervisor: Clement Merckling
For more information or application, please contact the supervising scientist Xiangyu Wu (xiangyu.wu@imec.be).
Imec allowance will be provided for students studying at a non-Belgian university.