Single-Event Transient Current Pulse Modeling by TCAD in sub-100 nm CMOS technologies

Single-event effects (SEEs) present significant challenges for integrated circuits (ICs) operating in space environments. When energetic particles strike sensitive regions of these devices, ionization generates free charges, resulting in transient voltage perturbations known as single-event transients (SETs). In analog circuits or combinatorial logic, these SETs can lead to various kinds of SEEs, such as single-event upsets (SEUs) and single-event functional interrupts (SEFIs).

To model SETs in circuits, a double-exponential current model is often used. However, this approach has limitations when compared to experimental data, particularly in accounting for charge recombination effects, which are critical to accurately representing SET phenomena. This project aims to develop a mathematical SET current pulse model, which can be used in the standard IC design flows. Such a model will enhance understanding of the underlying mechanisms and facilitate the extraction of key parameters for improved SET modeling.

Main Tasks

1. Analyze Charge Recombination Effects: Investigate the charge recombination processes based on simulation results and develop a mathematical model to describe these effects.
2. Simulating SETs in Bulk CMOS Transistors: Perform in-depth modeling to study SET behavior and analyze its impact on device performance.
3. Develop a SET current pulse model for sub-100 nm CMOS Technology using literature references and validate the model against experiments and/or TCAD simulations.
4. Cross-Verifying with SPICE Simulations: Update the SPICE SET model using insights from the physical-level (TCAD-like) simulations and validate the results against experimental data to ensure the theory's accuracy and applicability.
5. (Optional) Extension of SOI technology: Further extending the bulk model to FD-SOI technology and comparing the difference in SET process and mechanism .