Machine Learning-Assisted Run-Time Power and Thermal Estimation in High-Performance Computing Processors

Topic Description:
Join us in addressing a critical challenge in modern computing: run-time power and thermal estimation in high-performance processors empowered by machine learning techniques. This master thesis opportunity, within IMEC's System and Technology Co-optimization (STCO) program, aims to pioneer future technology scaling by optimizing Power, Performance, Area, Cost, and Temperature (PPACT).

Your primary task will be to develop methodologies for run-time power and thermal estimation in high-performance computing processors. Drawing inspiration from recent advancements in machine learning, you will design and implement innovative techniques for accurate and efficient estimation of power and thermal dynamics during run-time[1]. Furthermore, you will explore the integration of machine learning or deep learning techniques into the power and thermal estimation process, building upon the success of frameworks like APOLLO[2]. Your research will encompass both dynamic and static power estimation, enabling comprehensive power breakdown analysis crucial for optimizing energy-efficient designs.

In addition to algorithmic development, you will implement your methodologies in real-world scenarios and conduct evaluations using advanced technology nodes and industry-standard benchmarks. This hands-on experience will provide valuable insights into the intricacies of power and thermal management in high-performance computing processors.

You will collaborate closely with our team of system architects and PPACT researchers, ensuring alignment with future technology trends and research goals. This collaborative environment will support you in making significant contributions to the field of run-time power and thermal estimation for high-performance computing processors in advanced technology and packages augmented by machine learning.

Required background: We seek candidates (MSc or PhD) with a background in Electronic/Computer Engineering, possessing a strong understanding of Computer Architecture and Microarchitecture/ISA. Familiarity with classic machine learning methods is preferred. Proficiency in programming languages such as C, Python, SystemVerilog/VHDL, and RTL simulation is necessary.
Type of work: This role provides a balance of theoretical study and hands-on experience, with 20% dedicated to literature study and 80% to hands-on methodology development and RTL-level simulation.
Duration: 6-9 months

References:
[1] Pagliari, D.J., Peluso, V., Chen, Y., Calimera, A., Macii, E. and Poncino, M., 2018, March. All-digital embedded meters for on-line power estimation. In 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE) (pp. 737-742). IEEE.
[2] Xie, Z., Xu, X., Walker, M., Knebel, J., Palaniswamy, K., Hebert, N., Hu, J., Yang, H., Chen, Y. and Das, S., 2021, October. APOLLO: An automated power modeling framework for runtime power introspection in high-volume commercial microprocessors. In MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture (pp. 1-14).

Type of Project: Combination of internship and thesis 

Master's degree: Master of Engineering Technology; Master of Science 

Master program: Computer Science; Electrotechnics/Electrical Engineering 

Duration: 6-9 months 

For more information or application, please contact Yukai Chen (yukai.chen@imec.be)

Imec allowance will be provided for students studying at a non-Belgian university.