Hermetic encapsulation of advanced packages
Gent | More than two weeks ago
Background:
Advanced packaging has become a critical aspect of high-performance computing (HPC) solutions. The cost of system-on-chip (SoC) designs has risen dramatically as chip size and complexity have increased. In HPC applications, heterogenous integration has been adopted, in which SoCs are redesigned into smaller chiplets and integrated using advanced packaging.
These advanced packaging approaches worsen the thermal problem by increasing system power density, leading to higher heat fluxes and thermal crosstalk between adjacent or stacked dice, which are in close physical, and thermal, proximity. These challenges cannot be addressed by traditional air-cooled heat sinks, making liquid cooling solutions essential.
Within this PhD program, you will explore an immersion cooling approach for advanced packages. The package will be encapsulated using ultrathin ceramic diffusion barriers, to protect chiplets and interconnects from the cooling liquid, while minimizing thermal resistance. This PhD research project addresses an unexplored area: hermetically encapsulating advanced chip packages with an optimized thermal behaviour, including thermal modelling of thin-film layer stacks, optimization of low temperature atomic layer deposition processes, characterization of thin-film material thermal properties, and the application of the encapsulation stack on dedicated test vehicles allowing to assess liquid cooling performance.
What you will do:
You will gain a deep understanding and hands-on experience in developing hermetic encapsulation technology, a become a pioneer in analyzing the thermal behavior of liquid-cooled advanced packages. This includes:
- Acquire comprehensive knowledge in hermetic encapsulation technology and related areas.
- Engage in thorough literature reviews from both academia and industry to stay updated on the latest trends in cooling solutions for advanced packages.
- Develop a simulation model to predict the thermal behavior of multilayer ceramic thin-film coatings.
- Collaborate with colleagues from cross-functional teams to fabricate encapsulation layers using atomic layer deposition, employing carefully designed test vehicles.
- Demonstrate your solution using a state-of-the art advanced packages.
Imec research group and team
This research project will be carried out mainly at CMST in Ghent supervised by the PhD promotor, but with a strong collaboration with imec in Leuven under supervision of the co-promotor. As such the PhD student can make optimal use of the available knowledge and infrastructure at both locations. The atomic layer deposition work will be performed in the CMST cleanroom in Ghent, while the material characterization work will take place in imec in Leuven, together with the modeling and liquid cooling experiments. The advanced package test vehicle will be defined in close collaboration with the 3D and Optical IO program.
Required background: Material Science, Engineering Technology, Electrical Engineering.
Type of work: Literature study (10%), design and simulation (20%), cleanroom fabrication (40%), characterization (20%), discussions (10%)
Supervisor: Geert Van Steenberge
Co-supervisor: Herman Oprins
Daily advisor: Maaike Op de Beeck
The reference code for this position is 2025-173. Mention this reference code on your application form.