Compact modelling and calibration for imec's InP HBT technology

InP HBTs are a promising contender for mm-wave circuits and systems and their extension into the THz realm [1, 2]. One of the obstacles of deploying InP technology in production circuit design is the lack of accurate transistor models. Fabrication and circuit design are linked by compact device modelling, i.e., the electrical characteristics of the devices fabricated on a wafer are represented by sufficiently simple but preferably still physics-based models that are suitable for circuit simulation and optimization. The importance of modelling has been growing rapidly due to strongly increased device complexity, manufacturing cost, and fabrication time. 

Several attempts have been made to create a reliable compact model for HBTs. Since these attempts are based on the SPICE Gummel-Poon model, which is not even adequate anymore for describing modern BJTs, this modelling-gap severely limits circuit optimization and, thus, the exploitation of the true potential of InP HBT technology. The HIghCUrrent Model (HICUM) Level2 (L2) has shown some promise in becoming a standard compact model for bipolar junction transistors (BJTs) and heterojunction bipolar transistors (HBTs). The model has been shown to be applicable to SiGe HBTs [3] and to InP HBTs [4, 5].

An HBT compact model, although very useful in modelling an HBT device, still needs some rigorous calibration to be useful.  This calibration includes finding values of geometry and material-specific model parameters applicable to the technology for which the model is being calibrated.  The determination of the model parameters from device measurements, typically called parameter extraction, includes the specification of measurement conditions and the mathematical procedure for data manipulation for obtaining the desired parameter values. 

Imec has been playing a leading role in the development of an InP HBT technology for advanced RF applications for more than a decade. In this context, imec is working on the development of InP/GaAsSb HBT technology on 300mm wafers. To be able to design reliable RF circuits using imec's InP HBT technology, a physics-based compact model calibrated to its own technology would be required. It is the aim of this project to create such a compact model utilizing the currently available compact model setup and calibrate it to imec's HBT technology. This would require a combination of modelling (70%) and electrical characterization (30%) on imec's HBT devices respectively.
 
 
[1] M. Rodwell, M. Le, and B. Brar, "InP bipolar ICs: Scaling roadmaps, frequency limits, manufacturable technologies," Proc. IEEE, Vol. 96, no. 2, pp. 271-286, 2008.
[2] T. Kazior et al., “Integration of III-V transistors and Si CMOS on silicon substrates: A path to adaptable, reconfigurable, high performance circuits”, Proc. GomacTech, Orlando, pp. 23-26, 2011.
[3] M. Schroter and A. Chakravorty, “Compact hierarchical modeling of bipolar transistors with HICUM”, World Scientific, Singapore, ISBN 978-981-4273-21-3, 2010.
[4] M. Schroter, A. Pawlak, P. Sakalas, J. Krause, T. Nardmann, “ SiGeC and InP HBT compact modeling for mm-wave and THz applications”, inv. paper, CSICS, pp. 181-184, 2011.
[5] T. Nardmann, P. Sakalas, Frank Chen, T. Rosenbaum, M. Schroter, “A geometry scalable approach to InP HBT compact modeling for mm-wave applications”, IEEE CSICS, pp., 2013

Type of Project: Combination of internship and thesis 

Master's degree: Master of Engineering Technology; Master of Science 

Master program: Nanoscience & Nanotechnology; Electrotechnics/Electrical Engineering; Computer Science; Physics 

Duration: 6 months 

Supervisor: Bertrand Parvais (VUB) 

For more information or application, please contact Abhitosh Vais (abhitosh.vais@imec.be).

Imec allowance will be provided.