Semicon Korea 2025
February 19 - 21, 2025 | COEX, Seoul
Imec will be present at this year’s Semicon Korea with several contributions covering key advancements in semiconductor technology. Highlights will include the importance of Moore's Law and new architectural approaches in meeting AI's growing computing demands. Discussions will cover High NA EUV lithography, emphasizing its increased Numerical Aperture (NA) of 0.55, enabling scaling down to 8nm. Wafer-to-wafer hybrid bonding challenges will be addressed, focusing on bonding overlay precision and Cu pad expansion. Backside power delivery will be introduced, decoupling signal and power wiring to improve routing efficiency and lower IR drop values. The need for advanced memory solutions like High-Bandwidth Memory (HBM), processing-in-memory (PiM) and 3D DRAM to handle AI workloads will be emphasized. UV-assisted cleaning techniques for 3D packaging will be showcased, improving PR removal and post-etch residue cleaning. The potential of GaN-Si for 5G+/6G communications and power electronics will be explored, addressing challenges like thermal management and substrate losses.
On the eve of Semicon Korea, imec is hosting ITF Korea. The event will showcase imec’s latest breakthroughs, including advancements in high-NA lithography, 3D packaging, silicon photonics, GaN for connectivity and sensing, and chiplets for automotive. The event will also provide insights into maximizing the impact of these technologies through deep-tech venturing, accessible prototyping and manufacturing platforms, and collaborative ecosystems. Discover the full program and register here.
Imec
February 19th
- Luc Van den hove, President and CEO, will deliver a keynote presentation on "The versatile future of semiconductor systems" at 10:45AM.
- Andrea Mingardi, R&D Team Leader for Compute lithography, is the invited speaker for the presentation "High NA EUV lithography enabling Logic and Memory patterning breakthroughs " at S1. Advanced Lithography at 1PM.
- Joeri De Vos, R&D manager 3D process integration, is the invited speaker for the presentation "Wafer- to- Wafer Hybrid Bonding Challenges including Wafer Stress/Shape Impact on 3D Integration" STS S2. Advanced Materials & Process Technology at 2:35PM.
- Anabela Veloso, Principal Member of Technical Staff, is the invited speaker for the presentation "Backside Power Delivery: Game Changer and Key Enabler for Advanced Compute Scaling" at S3. Device Technology at 1:40M.
- Inhee Lee, Program Director for Active Memory, will give a presentation on "New Demand of Memory & Storage for AI Revolution" at S3. Device Technology at 5:10PM.
February 20th
- Naveen Reddy, R&D Team lead (Surface and Interface Processing group), is the invited speaker for the presentation "UV assisted cleaning: Two Tales from 3D Packaging and Nano Interconnect" at S5. CMP & Cleaning Technology at 4PM.
February 21st
- Nadine Collaert, Fellow, will give a presentation on "Unlocking the potential of GaN-Si: Advancing 5G+/6G communication and power electronics" at Compound Power Semiconductor Summit at 9:30AM.
Event details
This exhibition will showcase the latest semiconductor materials, equipment, and related technologies. With special features including semiconductor technology symposium, market trend forum, supplier search programs and networking events to exchange the latest information. This will be a real and strategic opportunity to examine the present and future of the global semiconductor industry.