IEEE International Electron Devices Meeting

Imec will be present at the 2023 IEEE International Electron Devices Meeting (IEDM) as (co-)author of 16 papers, including three invited papers, two features in the focus session and one IEDM committee highlighted paper. Imec’s contributions show progress in advanced logic technologies, memory technologies, interconnect and 3D integration, technologies for 5G-advanced wireless communication, advanced photonics for image sensors, and bioelectronics. Imec will also host a tutorial on ‘Reliability Challenges of Emerging FET Devices’, to be presented by Jacopo Franco, principle member of technical staff at imec.

Highlights

• Technical session: High Performance mmWave AlN/GaN MISHEMTs on 200 mm Si Substrate, S. Yadav, et al.

We demonstrate high performance AlN/GaN MISHEMTs on 200 mm Si substrate grown using MOCVD. We systematically studied the trade-off between RF small- and large-signal performance on scaling AlN and in-situ SiN gate dielectric thicknesses. A record large-signal performance at 28 GHz is achieved.

• Technical session: Charge Movement in Back Barrier Induced Time-Dependent On-State Breakdown of GaN HEMT, H. Yu, et al.

We elucidate a mechanism behind time-dependent on-state breakdown of GaN HEMTs, where the time-to-failure varies from sub-μs to hundreds of seconds. We reveal that the breakdown is sequentially caused by charge movement in the back barrier (BB), drain-corner electric field densification, impact ionization, and avalanche breakdown.

• Technical session: Scaling the SOT track – A path towards maximizing efficiency in SOT-MRAM, S. Van Beek, et al.

We demonstrate the functionality of an extreme perpendicular spin-orbit torque (SOT)-MRAM where the SOT layer and magnetic tunnel junction (MTJ) pillar exhibits comparable dimensions. This novel design leads to a significant reduction in the power consumption (63% decrease), an enhancement in endurance (>1015 cycles), and a reduction in bit-cell area.

• Technical session: Pulse-Based Capacitive Memory Window with High Non-Destructive Read Endurance in Fully BEOL Compatible Ferroelectric Capacitors, S. Mukherjee, et al.

We report on the pulse-based non-destructive read of a record high capacitive memory window in a BEOL compatible HZO-based ferroelectric capacitor. Contrary to conventional reading schemes, we show that the non-destructive read operation enables a full decoupling between the read- and write-endurance and we demonstrate a read-endurance beyond 1e11 cycles.

• Technical session: The Challenges and Solutions of Cu/SiCN Wafer-to-Wafer Hybrid Bonding Scaling Down to 400nm Pitch, S.A. Chew, et al.

In this paper, we review the current state of W2W bonding technology and discuss recent breakthroughs that have enabled significant scaling. The results show successful control of Cu/SiCN surface topography, precise alignment accuracy, and favorable electrical performance. We analyze the relationship between bonding overlay and contact resistance, yield performance, and reliability.

• Technical session: ESD Challenges in 300nm Si Substrate of DTCO/STCO Scaling Options, W.C. Chen, et al.

In DTCO/STCO era, sub-µm Si substrate is essential for vertical connections. This work first- time evaluates the ESD performance of various ESD devices with 300nm wafer thickness and nTSV. The thermal dissipation of these ESD devices with BS contact/ metals were studied for a possible solution to the thermal issue.

• Technical session: Wafer-level-integrated vertical-waveguide sub-diffraction-limited color splitters, J. Genoe, et al.

We demonstrate a new technology for splitting colors with sub-micron resolution using standard backend processing. The color splitting is tunable via the geometry and can be designed to correspond to the color sensitivity of the human eye. The technology results in: higher signal-to-noise ratio, better color quality and enhanced resolution.

Overview imec contributions at 2023 IEDM

Saturday, Dec 9, 2023

• Tutorial: Reliability Challenges of Emerging FET Devices, J. Franco

Monday, Dec 11, 2023

• Technical session: Wafer-level-integrated vertical-waveguide sub-diffraction-limited color splitters, J. Genoe, et al.
• Technical session: ESD Challenges in 300nm Si Substrate of DTCO/STCO Scaling Options, W.C. Chen, et al.
• Technical session: Exploring manufacturability of novel 2D channel material 300 mm wafer-scale 2D NMOS & PMOS using MoS2, WS2, & WSe2, C. Dorow, et al.

Tuesday, Dec 12, 2023

• Technical session: Two-metal-level semi-damascene interconnect at metal pitch 18 nm and aspect-ratio 6 routed using fully self-aligned via, A. Gupta, et al.
• Technical session: Pulse-Based Capacitive Memory Window with High Non-Destructive Read Endurance in Fully BEOL Compatible Ferroelectric Capacitors, S. Mukherjee, et al.
• Technical session: The Challenges and Solutions of Cu/SiCN Wafer-to-Wafer Hybrid Bonding Scaling Down to 400nm Pitch, S.A. Chew, et al.
• Technical session: Backside Power Delivery: Game Changer and Key Enabler of Advanced Logic Scaling and New STCO Opportunities, A. Veloso, et al.  (invited)
• Technical session: Ultimate Layer Stacking Technology for High Density Sequential 3D Integration, I. Radu (Soitec), et al. (imec co-author)
• Technical session: Nanowell Field-Effect Transistors for Highly Sensitive Molecular Detection, L. Liu, et al.
• Technical session: Dual-wavelength neural probe for simultaneous opto-stimulation and recording fabricated in a monolithically integrated CMOS/photonics technology platform, P. Neutens, et al.

Wednesday, Dec 13, 2023

• Technical session: Cradle-to-gate Life Cycle Assessment of CMOS Logic Technologies, L. Boakes, et al. (invited)
• Technical session: 3D Stacked Devices and MOL Innovations for Post-Nanosheet CMOS Scaling, N. Horiguchi, et al. (invited)
• Technical session: Ultimate MRAM Scaling: Design Exploration of High-Density, High-Performance and Energy-Efficient VGSOT for Last Level Cache, M. Gupta, et al.
• Technical session: High Performance mmWave AlN/GaN MISHEMTs on 200 mm Si Substrate, S. Yadav, et al.
• Technical session: Scaling the SOT track – A path towards maximizing efficiency in SOT-MRAM, S. Van Beek, et al.
• Technical session: Charge Movement in Back Barrier Induced Time-Dependent On-State Breakdown of GaN HEMT, H. Yu, et al

Event Details

IEEE International Electron Devices Meeting (IEDM) is the world’s preeminent forum for reporting technological breakthroughs in the areas of semiconductor and electronic device technology, design, manufacturing, physics, and modeling. IEDM is the flagship conference for nanometer-scale CMOS transistor technology, advanced memory, displays, sensors, MEMS devices, novel quantum and nano-scale devices and phenomenology, optoelectronics, devices for power and energy harvesting, high-speed devices, as well as process technology and device modeling and simulation.

Discover More