ECTC

Imec

Imec will be present at the 2024 IEEE 74th Electronic Components and Technology Conference with no less than 22 papers, of which 17 first-authored. The papers show progress on various 3D integration solutions, like advanced die-to-wafer or wafer-to-wafer hybrid bonding, advanced (optical) interconnects, backside power delivery networks, and looking at (novel modeling approaches and integration processes. The proposed innovations cover multiple application domains, including high-performance computing, quantum technologies and artificial intelligence, servers and data centers.

Imec highlights

Imec highlights two papers on die-to-wafer hybrid bonding. One paper shows a Cu-to-Cu and SiCN-to-SiCN die-to-wafer bonding process resulting in a Cu bond pad pitch of only 2µm at <350nm die-to-wafer overlay error, achieving good electrical yield. These fine-grained die-to-wafer interconnects pave the way to logic/memory-on-logic and memory-on-memory applications. On the longer term, die-to-wafer bonding will enable also die- and wafer-level optical interconnects – for which imec demonstrated a first proof of concept in a second paper at ECTC2024.

• Direct Die-to-Wafer Hybrid Bonding Using Plasma Diced Dies and Bond Pad Pitch Scaling Down to 2 µm, Y. Lin et al.  
• Collective Die-to-Wafer Assembly Process for Optically Interconnected System-on-Wafer, K. Kennes et al. 

Imec contributions

Wednesday 29 May, 2024 

Session 2: Advanced Die-to-Wafer Hybrid Bonding for Heterogeneous Integration 

• Direct Die-to-Wafer Hybrid Bonding Using Plasma Diced Dies and Bond Pad Pitch Scaling Down to 2 µm, Y. Lin et al.  

Session 8: Sub-Micron Scaling in Wafer-to-Wafer Hybrid Bonding 

• Scaling Cu/SiCN Wafer-to-Wafer Hybrid Bonding Down to 400nm Interconnect Pitch, B. Zhang et al.  

Session 9: Advanced Processes for Chip Stacking 

• IR Laser Release for 3D Stacked Devices: Effect of the Release Stack Structure on the Debonding Mechanism, F. Chancerel et al 

• Process Development and Characterization of Ru-Based UBM for In Bumps Interconnects Integration for Quantum Assemblies, H. Le Tulzo et al. (co-authored by imec) 

Session 10: Novel 3D Integration and Hybrid Bonding Solutions 

• Investigation of Distortion in Wafer-to-Wafer Bonding With Highly Bowed Wafers, S. Kang et al. 

Session 12: Artificial Intelligence and Advanced Modeling Approaches 

• Experimentally Validated Thermal Modeling Prediction for BEOL and BSPDN Stacks, X. Chang et al.  

Thursday, 30 May, 2024 

Session 16: Reliability of High-Density and High-Power Packages 

• Reliability Investigations of Advanced Photosensitive Polymer Based RDL Processes Protected by Inorganic Capping Layers, E. Chery  

• BGA Electromigration Performance and Why it Has Become the Bottleneck, R. Labie et al.  

Session 18: Radio Frequency Antenna-in-Package and Component Design 

• RF Modelling and Characterization of TSV and Inductive Links of Hybrid Bonding, X. Sun et al. 

Session 19: 3D Integration Copper-Copper Hybrid Bonding 

• Methodologies for Characterization of W2W Bonding Strength, M. Gonzalez et al. 

Session 20: Novel High-Density 3D & Thru-Via Structures and Processes 

• 3D Interconnects for Quantum Computing, J. Derakhshandeh 

Session 39: Interactive Presentations 3 

• Multi-Tier Die Stacking Through Collective Die-to-Wafer Hybrid Bonding, K. Kennes et al.  

• Simulation of Bulge-Out Mechanism Enabling Sub-0.5 µm Scaling of Hybrid Wafer-to-Wafer Bonding, J. De Messemaeker et al.  

• Wet Cu Passivation for High Throughput Fluxless Thermal Compression Bonding of Cu-Sn µbumps for Die-to-Wafer Stacking, J. Rip et al.  

• Exploring Bonding Mechanisms of SiCN for Hybrid Bonding 
  S. Ebiko et al. (co-authored by imec) 

Session 40: Interactive Presentations 4 

• Investigation on the Use of Al-Ge Eutectic Bonding in the Structural Part of a Multilayer Stacked MEMS Device, J. Wang et al.  

Friday, 31 May, 2024 

Session 25: High-Performance Computing, Design Challenges, and Solutions 

• Block Level and Package Level Thermal Assessment for Back Side Power Delivery Network, M. Lofrano et al.  

Session 26: Chiplet Interconnect Design and Validation 

• Impact of Pitch Scaling on 3D Die-to-Die Interconnects, N. Pantano et al.  

• A 32GB/s Full Duplex Bi-Directional Transceiver With Crosstalk Cancellation for Chiplet Interconnections, J.-W. Park et al (co-authored by imec)  

Session 28: Optical Interconnections 

• Interfacing Silicon Photonics for CPO, G. Van Steenberge et al.  

Session 33: Fine-Pitch Materials and Processes 

• 20 μm Pitch Cu-to-Cu Flip-Chip Bonding Through Cu Nanoparticles Sintering, X. Ji et al. (co-authored by imec) 

Session 34: Photonics Integration, Materials, and Processes 

• Collective Die-to-Wafer Assembly Process for Optically Interconnected System-on-Wafer, K. Kennes et al. 

Event details

The Electronic Components and Technology Conference (ECTC) is the premier international event that brings together the best in packaging, components and microelectronic systems science, technology and education in an environment of cooperation and technical exchange. ECTC is sponsored by the IEEE Electronics Packaging Society.

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