3D & system Summit

imec

Dimitrios Velenis, Head of the 3D and silicon photonics device and components group at imec will present on June 12th 5:55 pm - 6:15 pm on Heterogeneous Integration of Photonic Interconnects to Address AI Challenges – HiConnects

Scaling the bandwidth and energy efficiency of optical interconnects is addressing the growing needs of global data traffic and AI/ML applications within datacenters today. Combining optical interconnects with advanced packaging solutions is expected to be the answer for the extreme bandwidth density requirements for the upcoming AI applications. In this presentation, the steps taken in the HiConnects project to bring optical interconnects into advanced system packaging are discussed, together with a roadmap for serving both the computational and data bandwidth needs of AI applications through 3D integration of photonics and electronics.

Kurt Herremans, Program director automotive chiplets, will present on  June 13th 9.45 am - 10.05 am on Automotive Chiplet Alliance & Program at imec

Electrified, software defined autonomous vehicles offering an immersive digital experience require fast growth of the in-vehicle compute capabilities. The required compute scales beyond a single SoC capability, a problem other markets have also been facing and are solving by moving to chiplets and advanced packaging. Automotive has its specific set of environmental and functional requirements these future chiplet based designs need to address. Imec has been rallying the automotive supply chain to come together on these challenges through our ACA initiative and through collaborative research in our ACP program. During this talk we will discuss the challenges involved with chiplets and how imec sees a path forward.

Joeri De Vos, R&D manager 3D integration, will present on June 13th 1:40 pm - 2:00 pm on Cu/SiCN Wafer-to-Wafer Hybrid Bonding Scaling Down to 400nm Pitch - Challenges and Solutions

Advancement in EDA industry has enabled faster creation of better chiplet-based designs, while advancement in manufacturing industry has enabled robust volume production of such designs. One remaining challenge is ensuring product quality at a reasonable cost, with increasing design, manufacturing, and use case complexity as well as increasing number and types of chiplets to be integrated into one system. This presentation describes PDF Solutions’ vision and methodology around applying AI/ML in testing of chiplets and systems. 

Job Soethoudt, Researcher in Sustainable Electronics will present on June 14th from 9h25-9h45 Sustainable 3D - Why it Matters, Where to Start

Cost and yield are driving alternatives to monolithic SoC design. Designers are turning to heterogeneous integration of disaggregated SoC functions as chiplets interconnected using 2.5 and 3D IC package platforms. This in turn leads to a significant technology inflection point. Design teams need to transition to system-based optimization, expand their supply chain and design tool ecosystem and balance design resources across competing multi-domain requirements to achieve PPA and cost goals. This session will suggest and discuss a series of workflows that address these challenges and enable the design teams goals to be achieved.

Eric Beyne, Senior Fellow, VP R&D, Director 3D System Integration Program will present on June 14th from 11h14-11h20 on Conference Reflections by 3D & Systems Summit Committee Chair

Event details

The SEMI 3D & Systems Summit this year is dedicated to Smarter Systems through Heterogeneous Integration. The semiconductor industry has had several changes in market, products, and technology brought by disruptive technologies and Moore's Law plateauing so continued development and innovation are required.

Industry experts will share their developments in 3D integration, and heterogeneous integration roadmap processes for semiconductor manufacturing and applications.

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