CMOS: advanced and beyond
Discover why imec is the premier R&D center for advanced logic & memory devices.
Integrated photonics
Take a look at technologies for optical transceivers, sensors and more.
Health technologies
See how imec brings the power of chip technology to the world of healthcare.
Sensing and actuation
Explore imec’s CMOS- and photonics-based sensing and actuation systems.
Connectivity technology
Look into our reliable, high-performance, low-power network technologies.
More expertises
Discover all our expertises.
Research
Be the first to reap the benefits of imec’s research by joining one of our programs or starting an exclusive bilateral collaboration.
Foundry services
Build on our expertise for the design, prototyping and low-volume manufacturing of your innovative nanotech components and products.
Venturing and startups
Kick-start your business. Launch or expand your tech company by drawing on the funds and knowhow of imec’s ecosystem of tailored venturing support.
Education and workforce development
Imec supports formal and on-the-job training for a range of careers in semiconductors.
Solutions
Use one of imec’s mature technologies for groundbreaking applications across a multitude of industries such as healthcare, agriculture and Industry 4.0.
Analog Digital Converter14bit 200MS/s
This 200 MS/s 14 bit 2.3mW dynamic pipelined SAR ADC in 28nm CMOS with a new residue amplifier is suited for SDR receivers, eg LTE-A and IEEE 802.11ac.
| Macro Name | ADC ( Analog Digital Converter )14bit 200MS/s |
| Short Description(max 128 characters) | This 200 MS/s 14 bit 2.3mW dynamic pipelined SAR ADC in 28nm CMOS with a new residue amplifier is suited for SDR receivers, eg LTE-A and IEEE 802.11ac. |
| Extra description (optional) | Imec offers a white-box IP license with support on a low power 2x interleaved dynamic pipelined SAR ADC in 28nm digital CMOS, achieving a peak SNDR of 70.7 dB at 200 MS/s, at 2.3 mW consumption from a 0.9 V supply. This ADC uses a new residue amplifier for low noise at low power, and incorporates interleaved channel time-constant calibration. |
| Market category | preselect from 6 possible choices, also allow for multiple selections (at the same time) : Communications - Data processing - Consumer Electronics - Automotive - Industrial and medical - Military /civil aerospace - all - other |
| Possible applications & standards | This ADC is a good candidate for next generation Software Defined Radio ( SDR ) receivers, including LTE Advanced and the emerging generation of WIFI IEEE 802.11ac. |
| Primary Category | preselect from over 200 possible choices in sheet "IP Taxonomy", column A (e.g. Analog & Mixed Signal IP:A2D Converter) |
| Node / process | 28 nm digital HPM CMOS |
| Foundry | TSMC |
| Maturity | Silicon proven on prototypes, hence only white-box license (no corner characterization performed for high volume production) |
| Leaflet or datasheet URL | |
| Conference where this IP has been published | VLSI Circuits Symposium 2014 |
| Paper publication URL | Download the publication here |
| Chip area(for Hard IP only) (um**2) | 350 000 including 1 nF reference decoupling capacitance |
| Width (for Hard IP only) (um) | 700 |
| Height (for Hard IP only) (um) | 500 |
| Power (uW/MHz) | 11 |
| Constant Power (mW) | 2.3 mW at 200 MS/s |
| Constant Leakage Power (uW) | 81 |
| Features |
|
| Deliverables |
|